Information for S3 Chipset Users : Additional Notes
Previous: List of Supported RAMDAC Chips
Next: Reference clock value for IBM RGB 5xx RAMDACs

## 5. Additional Notes

Note that the Sierra SC1148{5,7,9} will not be distinguished from the Sierra SC1148{2,3,4} by the probe. The only difference between the two series as far as the server is concerned is that the {2,3,4} is capable of 15bpp, while the {5,7,9} is capable of 16bpp. So if you have a SC1148{5,7,9} and want to use 16bpp instead of 15bpp, you will have to specify a `RAMDAC "sc11485"` line as shown above.

Some RAMDACs (like the Ti3025) require some mode timing consideration for their hardware cursor to work correctly. The Ti3025 requires that the mode have a back porch of at least 80 pixel-clock cycles. A symptom of this not being correct is the HW cursor being chopped off when positioned close to the right edge of the screen.

Information for S3 Chipset Users : Additional Notes
Previous: List of Supported RAMDAC Chips
Next: Reference clock value for IBM RGB 5xx RAMDACs